From a599c69673da59fc129ceefffb73f8958f3d82f0 Mon Sep 17 00:00:00 2001
From: Efraim Flashner
Date: Wed, 20 Sep 2023 16:03:50 +0300
Subject: seqwish: Update to 0.7.9.

---
 seqwish-paryfor-riscv.diff | 20 ++++++++++++++++++++
 1 file changed, 20 insertions(+)
 create mode 100644 seqwish-paryfor-riscv.diff

(limited to 'seqwish-paryfor-riscv.diff')

diff --git a/seqwish-paryfor-riscv.diff b/seqwish-paryfor-riscv.diff
new file mode 100644
index 0000000..cecf806
--- /dev/null
+++ b/seqwish-paryfor-riscv.diff
@@ -0,0 +1,20 @@
+diff --git a/deps/paryfor/paryfor.hpp b/deps/paryfor/paryfor.hpp
+index b8ced09..0536580 100644
+--- a/deps/paryfor/paryfor.hpp
++++ b/deps/paryfor/paryfor.hpp
+@@ -51,6 +51,15 @@ static inline void spin_loop_pause() noexcept {
+ }
+ } // namespace atomic_queue
+ } // namespace paryfor
++#elif defined(__riscv) && (__riscv_xlen == 64)
++namespace paryfor {
++namespace atomic_queue {
++constexpr int CACHE_LINE_SIZE = 64;
++static inline void spin_loop_pause() noexcept {
++    asm volatile ("nop" ::: "memory");
++}
++}
++}
+ #else
+ #error "Unknown CPU architecture."
+ #endif
-- 
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